is a set of notes on the MC34063 smps controller chip. This chip
has been around for quite a while and is very inexpensive. It can
provide switched power conversion at currents of a few hundred
milliamps to over an amp depending on the configuration. It comes
in an 8 pin DIP and requires only a handful of additional
components. It is useful in applications such as providing
analogue positive and negative supplies from a single 5V logic
supply in small circuit boards. The control functions provided
consist simply of a comparator that gives hysteretic or bang-bang
control. This is thought to be very effective, giving excellent
transient performance, but its stability is not well understood.
The aim of these notes is to provide some insight into the
operation of the chip and associated circuits.
circuits and problems experienced
theory of operation is well covered in reference 2 of the
resources. The circuit operates by charging a timing capacitor on
pin 3 with a 35µA current until the voltage between it and ground
(pin 4) reaches 1.25V, then discharging at a current of 200µA
until the voltage falls to 0.75V. The charge current is modified
by a voltage at the Ipk-sense pin to shorten the charge time and
so reduce the maximum duty cycle. This provides a form of current
limiting. A set-reset flip flop is held in the reset state during
the discharge cycle, causing the output switching transistor to
turn off. During the charging period the flip flop is set when the
voltage at the feedback input (pin 5) falls below 1.25V. If the
1.25V then the flip flop remains always reset, while if the
remains below 1.25V the flip flop is
set for about 5/6 of an oscillator period, and reset for the
remaining 1/6 of the period (except during current overload).
simulation of analogue circuits, Berkeley SPICE has been the
program of choice for over 30 years. This program is opensource
and has been rewritten many times to improve performance and to
adapt it to a number of specialist application areas. While it is
no replacement for measurements on hardware, it can provide quite
good behavioural modelling of complex circuits, allowing many
errors and problems to be corrected before the hardware is built.
It is also valuable for gaining an intuition into how circuits
Two opensource simulators are provided with the gEDA
design suite: ngspice and gnucap. The former is developed around
the Berkeley SPICE 3 simulator, while the latter is interactive,
provides mixed mode simulation and has SPICE compatible models.
model for the MC34063 was developed in 2002 by AEi Systems
(reference 3) for the Intusoft simulator. This uses syntax for
behavioural modelling that is different to that of SPICE 3. The
conversion to PSpice mentioned in reference 3 uses different
In the following a SPICE 3 compatible model
for the MC34063 is provided. The model is different to the AEi
model but makes use of some information about MC34063 behaviour.
It is provided as opensource under the GPLv2 licence. The model
uses the u() step function of SPICE 3 to provide digital signal
conversions and processing, and as such should work with
simulators that claim SPICE 3 compatibility.
diagram of the model is presented in terms of comparators and
standard digital gates for clarity.
gschem circuit shown above is given here
for illustrative purposes. It includes a number of simple logic
gates built from nonlinear dependent voltage sources. This
file is not suitable in itself for generating a subcircuit as the
gates need to have their supplies referenced to the common pin of
the MC34063 rather than to ground (this could be done by defining
custom symbols). A well
documented subcircuit file is given here.
This has been tested using a number of test
circuits including the buck, boost and buck-boost example
configurations shown in the datasheets. The above circuit can be
run as a simulation. Simply place all files in the same directory
and move the symbol
files to the gEDA sym/local directory.
circuit in the top left of the diagram above is the oscillator.
This consists of a comparator working with hysteresis to provide
the 1.25V/0.75V switching points. To improve performance this was
replaced with a controlled hysteresis switch similar to that used
in the AEi model. The oscillator-source block generates the timing
capacitor current in response to the output of the comparator.
This current is modified by the transistor attached to the Ipk
input to cause the capacitor to charge up faster if Ipk increases
above about 400mV. This provides the current limiting capabilities
of the device. The signal "oscillator" provides a pulse
that goes low when the capacitor is being discharged.
the top right of the circuit is the flip flop that drives the
switching transistor. The differentiator formed by Cdelay and
Rdelay along with the squaring comparators provide two short
pulses, one following the leading edge of the oscillator pulse
(delayminus) and one following the
trailing edge (delayplus). These are used with the gates Xminus
and Xplus to ensure that the reset pulse is shortened at its
leading edge, and the set pulse is shortened at its leading edge.
This is needed to prevent the set and reset inputs of the flip
flop being active at the same time, and so causing the simulator
to choke. The RC integrators in the flip flop are also needed for
the same reason. The time constant of these must be much shorter
than the width of the delay pulses.
In the lower centre of
the circuit is the comparator that compares the feedback input
with the reference voltage to gate the set pulses to the flip
flop. The low-pass filter at this point was necessary to ensure
convergence. Xoutgate ensures that the flip flop output signal is
turned off when the feedback control signal is off. The switch
circuit includes a drive transistor fed by a current source that
ensures it is firmly turned on and off in response to the gated
control signal. The transistors need to have some capacitances and
resistances to be specified to avoid convergence problems.
is assumed that a working version of gEDA and ngspice is available
with a set of suitable SPICE models installed in the gEDA/models
directory. The latter can be obtained using the method described
in the gEDA setup
page. To get a
basic simulation going try the following commands. Ignore any
about unrecognized parameters in the diode model.
gnetlist -g spice-sdb buck.sch -o buck.net
ngspice 1 -> tran 100ns 10ms uic
ngspice 2 ->
ngspice 3 -> plot x1.cinvcontrol x1.set
The former plot should show the circuit output
hovering around 5V with a startup transient. The second will show
the gating signal applied to the set signal of the flip flop and
the set/reset signals in operation. Right-click on the graphs and
drag a small box to zoom in on the detail. This is about all that
can be done with these graphs.
Note that the uic parameter
in the transient analysis command, which says "use initial
conditions", is eseential to allow convergence to occur. The
reason for this is that at least one capacitor inside the MC34063
model has initial conditions. Beware that GUI helpers like
easy_spice may not include this parameter.
focus of this page is to study the behaviour of some switching
power circuits using the MC34063. For designing dc-dc converters,
the datasheets have a table of formulas that may be used, however
this should not be a replacement for understanding of the circuit
operation as the designs may need to be tweaked for a variety of
reasons. As well as the spreadsheet
provided here, more comprehensive resources can be found on the
web, see in particular references 4 and 5.
On a practical
note, take extra care with board layout. These chips can be
sensitive to noise on the power input rails, resulting in the flip
flop triggering prematurely and resulting in poor regulation and
overvoltage. Ceramic capacitors in parallel with the power input
electrolytic capacitor should be used to attenuate high frequency
is a straightforward dc-dc converter that produces an output
voltage less than the input voltage. We consider the conversion
from a 12V input to a 5V output for driving logic circuitry.
circuit uses a symbol from the gEDA symbol collection for the
MC34063. The 0.3R resistor provides nominal current limiting at
about 1A, although it kicks in seriously at about 1.5A with the
model we are using for the current limiting BJT. This is a bit
lower than that for the AEi model and closer to the 300mV trigger
specified for the MC34063. The 3R load allows a clear
demonstration of the current limiting in action. A 100µF filter
capacitor is a bit small for this circuit in practice, but allows
a transient simulation to be run in a reasonable time.
following plot shows a detailed portion of the resulting
simulation in ngspice. The blue plot is the voltage across the
current limiting resistor R0, which is proportional mainly to the
current through the output switch BJT. The yellow plot is the
feedback comparator gating signal that turns the switching process
on and off. With a large
filter capacitor, this signal typically spans a number of
oscillator cycles. The upward slope of the switch current is due
to the ramping up of the inductor current.
a circuit near to the current limiting point, having a current of
1.4A (any higher and the output voltage drops away while the
feedback gating signal is always on). Examination of the red
oscillator trace shows that the charge time is shorter during a
gated on period. The changes in oscillator slope and in the cycle
period are clearly visible as the feedback gating signal turns on
computation of the mean power in the source and in the load gives
a 95% efficiency at 50mA load current. Measurements give 83%. Some
of the difference may be in the filter capacitor ESR and inductor
series resistance which we have assumed as zero.
Sheet from ON Semiconductor.
ON Semiconductor publication "Theory and Applications of the
MC34063 and µA78S40 Switching Regulator Circuits".
of the MC34063 Switching Regulator Shafi Sekander and Mahmoud
Harmouch , Texas Instruments 2007.
Step-Up/Down Converter used to Design a Switching Power Supply,
Adriana Florescu, Constantin Radoi.
SPICE and PSpice models for the MC34063 from the book by
Power Electronics Corner. Lazar Rosenblat.
Mode Power Supply Design. Jerrold Foutz.