A Half H-Bridge Buck-Boost Converter with high side N-type MOSFET

The buck-boost converter is of value where the output and/or input voltages vary to such an extent that on occasions a buck converter is needed, while on other occasions a boost converter is needed. An example (that will be described further in another project) is that of a battery charger for a number of different battery types, voltages and capacities and powered by a 12V source.

The simplest buck-boost circuit uses a single inductor, MOSFET, catch diode and filter capacitor. This circuit is non-isolating and inverting. Other non-isolating buck-boost circuits include the Ćuk, which is inverting, and the Sepic, which is non-inverting. These circuits require two inductors which need not be coupled, although coupled inductors can provide much lower output ripple. A disadvantage of these circuits is that they require a coupling capacitor which must be able to support high ripple current.

The H-Bridge circuit provides a buck-boost function using a single inductor and without inversion. This is essentially a buck converter followed by a boost circuit. Since the former has its inductor is at the output while the latter has the inductor at the input, they may be replaced by a single inductor. A filter capacitor is not present in the buck part of the circuit. The control of this circuit involves separate control of each section, and as such tends to be somewhat complicated. A number of companies produce controller chips for this type of circuit, including Linear Technology (eg LTC3780, LTM4607).

The H-Bridge is so called because the MOSFETs form the sides of an H with the inductor as the crossbar. In this form the buck and boost parts of the circuit are operated in synchronous mode (second diagram below). It is also possible to operate the circuit non-synchronously using catch diodes in place of two of the MOSFETs as shown in the first diagram, with associated simplification of the circuit and its control. Such a circuit is described in reference 3 below.

This above diagrams show p-type MOSFETs used for the upper switch. N-type MOSFETs may also be used with the appropriate driver.


This circuit is commonly described as a classic buck-boost converter, although useful Internet references for this circuit are rare. Reference 2 gives a good description of the drawbacks of the circuit, most of which focus on its efficiency, and high inductor and capacitor current. The way they suggest to overcome this is to place the circuit into either buck or boost mode depending on the input voltage, with a buck-boost mode near the point where the output and input voltages are the same. Reference 3 discusses a control scheme wherein the buck and boost sections are controlled by different circuit state variables. They investigate efficiency against the relative phase of the switching of each section, and show that it varies little if at all regardless of the phase difference.

We provide a more detailed theoretical and simulation investigation of the H-bridge buck-boost converter to illuminate the modes of operation and to determine estimates of efficiency.

Reference 3 refers to a control chip by STL Electronics for the H-bridge circuit. The authors insist that one of the four states of the two switches should be excluded. This makes the control algorithm rather complex. No justification for this is given other than that it doesn't occur in either the buck or boost circuit states. Our simulations indicate that any efficiency gains from applying this restriction are incidental and appear to be small.


The following circuit was developed to investigate the algorithms needed to drive the half-bridge buck-boost converter.

The MOSFETs are logic level n-types that were scrounged out of old computer motherboards, and can be replaced with other suitable low voltage, low on-resistance types. These particular MOSFETs have an on-resistance of about 20mΩ at 10V gate-source voltage. The Schottky diodes were also scrounged out of old equipment and can handle 10A forward current. The drive circuitry has already been discussed in earlier SMPS projects. The drive circuit for the upper MOSFET uses a charge pump to raise the MOSFET gate voltage above the input voltage. This requires that the PWM duty cycle have an upper limit that is less than unity, so that the gate-source voltage can rise high enough to keep the MOSFET turned fully on. This requirement could be avoided by using a p-type MOSFET. The microcontroller is a readily available ATMega48. This is far from being the ideal controller to use in this application, having a single 10-bit A/D converter that can provide only 15K samples per second at full resolution, rising to a maximum of 77KSps at 8 bit resolution, and having a bandwidth of only 40kHz. The inductor was also taken from old equipment, and while this is an appropriate inductance for the task, it needs to be selected more carefully to be able to handle the heavier currents. The resistors used in the measurement parts of the circuit are 1% metal film for good temperature stability.

With the timer clock at full rate and an 8MHz microcontroller clock, a top count of 64 will give a pulse frequency of 62.5kHz. This results in the PWM having a resolution of 6 bits.

The A/D converter on the ATMega48 is operated at its maximum rate of 1MHz which means that the resolution is limited to only 8 bits. Conversion time is 13 microseconds or 76KS/s maximum conversion rate. The on-chip sample and hold circuit has a bandwidth of only 40kHz which gives the main speed limit for the SMPS.

The input voltage, output voltage and current are sampled by the microcontroller. The input voltage is needed to determine the duty cycle of the buck converter part. The output current is sensed to provide a current limiting function. The current sense resistor R18 is an 0.1Ω, 5W resistor which will handle up to 7A, and which is satisfactory in the circuit for currents up to about 2A. It should be reduced for higher currents to limit the associated power loss. The current measurement is referenced to analogue ground in a gain 10 differential amplifier. The output voltage is attenuated by 0.267 in a simple voltage divider, and is also referenced back to analogue ground. The LM324 is a single supply quad operational amplifier that is powered from the input voltage.

The ground points labelled PGND are taken to a common point on the board near the power switching circuitry. The microcontroller digital ground and the analogue grounds are connected to that point by separate runs. The ground runs for the remainder of the circuitry, including the operational amplifier, are taken to a common point at the microcontroller analogue ground pin.

When the PWM control outputs from the microcontroller are high, the corresponding MOSFET is turned off. These outputs are pulled high so that the MOSFETs are normally off during a microcontroller reset (when the I/O ports are all set as inputs). This is important during firmware programming of the microcontroller as the reset can be applied for an extended period of time.

Safety Considerations

The circuit includes a boost converter which can potentially reach very high voltages. Since it is controlled by the microprocessor program a minor software error can result in a potentially lethal situation (not to mention damage to the circuit). Ensure that the output voltage is monitored and seriously consider precautions to be taken to avoid electric shock during development and testing.

Practical Considerations

The circuit involves moderately high currents of several amps, but it is still possible to use prototyping board if care is taken. The components in the power part of the circuit between the power input and ground points and the power output points need to be kept together with reinforced, short lead lengths, and all ground references must be taken from one single point. The short lead lengths will minimize stray inductances which can result in oscillations. The MOSFET drivers also need to be kept close to the associated MOSFETs to minimize the gate discharge current path lengths. The analogue measurement parts of the circuit also need to be ground referenced carefully from a single point to avoid picking up unwanted stray voltages. The remainder of the low current circuitry can be distributed a little less rigorously.

Control Algorithms

The fact of having two converters to control complicates the algorithm. This can be managed by separating the algorithm into regions in which ony one of the converters is being controlled, with the other one kept in a static state. This can improve efficiency as either the buck or boost converter can be turned off when not needed. A suitable control could be as follows:

  • If the measured input voltage VI is less than the target output voltage VT minus a safety margin (VI < VT - ð), set the buck converter to maximum and control the boost converter.
  • If the measured input voltage is greater than the target output voltage plus a safety margin (VI > VT + ð), set the boost converter to minimum and control the buck converter.
  • If measured input voltage falls within the safety band, set the boost converter to raise the input voltage above the top of the safety band and control the buck converter.
This rather simple algorithm is also given in reference 2, where it is stated as being the basis of a patent application!

Bang-Bang Control

In this control algorithm, the output current, and the input and output voltages are sampled by the A/D converter using the microcontroller's internal 5V reference voltage. When controlling the buck converter, if the measured output voltage and the measured output current are both below the target output voltage and current, the PWM duty cycle is set to maximum, otherwise it is set to zero. When controlling the boost converter, if the measured output voltage and the measured output current are both below the target output voltage and current, the PWM duty cycle is set to a suitably high value, otherwise it is set to zero. The high value selected must ensure that the output voltage can reach the highest voltage required by the application. It cannot be set to be fully on as this would open the lower MOSFET and effectively short the inductor output to ground. Parasitic reactances in the circuit will then result in very high and uncontrollable output voltages being generated.

This algorithm was tried but was found to give difficulties in determining how to set the maximum boost duty cycle.

Note that reference 1 below suggests that the boost circuit be controlled by the input voltage and output current, while the output voltage control the buck circuit. This causes the main output ripple control to operate on the buck circuit only. This is linear and therefore will produce lower ripple than will a bang-bang control on the nonlinear boost circuit.

Slow Control

Another algorithm suitable for battery chargers uses a much more relaxed mode of determining the correct level. Firstly the input voltage is measured and used to determine a target value for the boost duty cycle. This is calculated from the theoretical relationship between output voltage and duty cycle:

Vout = Vin/(1-D)

Dmax = 1-Vin/Vmax

where Vmax is the maximum output voltage, and Dmax is the target duty cycle. After taking losses into account Dmax will be less than the actual maximum duty cycle. On startup the boost and buck duty cycles are set to zero and the buck duty cycle is gradually increased to its maximum. If the desired output voltage or current limit has not been reached, the boost duty cycle is then increased up to Dmax. After that it is increased at a much slower rate. When the output voltage and current limits are exceeded, the boost duty cycle is reduced first until it reaches zero, then the buck duty cycle is reduced.

Pseudo code for this is:

do {
        measure_voltages_and_currents(Vi, Vo, Io);
        boost_max = 1-Vi/Vmax;
        if ((Vo < target_Vo) && (Io < target_Io))
            if (buck_PWM < buck_max) buck_PWM++;

            else if ((boost_PWM < boost_max) && delay_ended) boost_PWM++;

          if (boost_PWM > 0) boost_PWM--;
          else if (buck_PWM > 0) buck_PWM--;

Linear Control

The above algorithms are heuristic and do not necessarily guarantee stability nor exhibit good behaviour under loads of different kinds. The following is a linear control theoretic investigation into stability and performance of this circuit for a resistive load.

To Be Done


As well as data sheets for existing controller chips, the following publications provide some more information about this type of converter:
  1. "H-Bridge Buck-Boost Converter with Dual Feedforward Control" by Keiko Muro, Takashi Nabeshima, Terukazu Sato, Kimihiro Nishijima and Shinichi Yoshida. Power Electronics and Drive Systems, 2009. PEDS 2009. 2-5 Nov. 2009, pp: 1002 - 1007, Taipei.
  2. "A High Efficiency, Non-Inverting, Buck-Boost DC-DC Converter" by Mark Gaboriault and Andrew Notman, Allegro MicroSystems.
  3. "An MCU-Based Low Cost Non-Inverting Buck-Boost Converter for Battery Chargers" STMicroelectronics AN2389 August 2007.

First created 20 September 2010

Last Modified 10 January 2011
© Ken Sarkies 2010